The advanced microcontroller bus architecture AMBA specification defines three types of buses:
(1) AHB (AdvancedHigh-performanceBus): Used to connect high-performance system modules. It supports burst data transmission mode and single data transmission mode, all timings refer to the same clock edge;
(2) ASB (AdvancedSystemBus): used to connect high-performance system modules, it supports burst data transmission mode;
(3) APB (AdvancePeripheralBus): It is a simple interface that supports low-performance peripheral interfaces.
A typical AMBA-based microcontroller integrates AHB (or ASB) and APB interfaces at the same time, as shown in Figure 2. The ASB bus is the bus of the old system, and the new version of the AHB bus has enhanced support for performance, synthesis and timing verification. The APB bus is usually used as a local second bus, as a single slave module on the AHB or ASB.
Figure 28 AMBA bus structure diagram
According to the AMBA specification, the only function of the APB bridge connecting AHB/ASP and APB is to provide a simpler interface. Any delay caused by low-performance peripherals will be reflected by the bridge connected to the high-performance (AHB/ASP) bus. The bridge itself is like a master device of a simple APB bus. It accesses the slave devices connected to it and controls them through a subset of the control signals on the high-performance bus. The main features of AHB, ASP and APB are given below.
AHB
AHB is an advanced system bus. Its main purpose is to connect high-performance, high-throughput devices, such as CPU, DMA, and DSP. Its main features:
â—High-performance next-generation bus; â—Multi-controller; â—Segmented transmission; â—Single-cycle bus control transfer; â—No tri-state implementation; â—32～128-bit bus width; â—Includes an access protection mechanism for Distinguish between privileged access and unprivileged access modes, or command and data extraction, etc.; â—The burst transmission mode is up to 16 sections; â—Access space is limited to 32 bits; â—Provide a mechanism to throttle data flow for slower device use; â—Support Arbitration, REQ, GNT and LOCK; â—Support byte, half word and word transmission.
AHB bus and ASB bus have the following different characteristics: â—AHB bus supports separate processing. Slaves with long response delays give up the bus to other transmission operations when preparing to transmit data; â—Use a single clock edge to control all operations, which is conducive to synthesis and design verification (by using static timing analysis and other similar tools); â— Use a central multiplexer bus scheme instead of a three-state drive bidirectional bus; â—Support wider 64-bit or 128-bit data bus configuration.
ASP
ASP is a general-purpose system bus, a high-performance interconnection between microprocessors and system peripherals. The main features are as follows:
â—Multi-controller; â—burst data transmission mode; â—pipeline transmission; â—32-128-bit bus width; â—includes an access protection mechanism to distinguish between privileged access and unprivileged access modes, or instruction and data extraction, etc.; â—Two-way data bus; â—Provide a mechanism to throttle data flow for slower devices; â—Arbitration supports REQ, GNT and LOCK.
APB
APB is a peripheral interconnection bus. The focus is on minimum power consumption and ease of use. The main features are as follows:
â—Low performance, low power peripheral bus; â—Single controller; â—Very simple, only 4 control signals (plus clock and reset); â—32-bit address space; â—Up to 32-bit data bus; â—Separate reading and writing Data Bus.
AMBA is a basic SoC bus, which is divided into three types of buses. According to needs, the system designer must choose which of the three types of buses to connect. A high-performance device may choose AHB or ASP bus, which will bring difficulties to IP core integrators, because both buses try to access the same type of device. There is no clear way to integrate the device with the AHB and ASP buses. The APB bridge does not seem to provide any benefits, but also limits the high-performance buses connected to it. All three types of buses contain an address state and one or more data states.
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